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» Symbolic analysis of analog circuits with hard nonlinearity
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DAC
1999
ACM
13 years 9 months ago
Circuit Complexity Reduction for Symbolic Analysis of Analog Integrated Circuits
This paper presents a method to reduce the complexity of a linear or linearized (small-signal) analog circuit. The reduction technique, based on quality-error ranking, can be used...
Walter Daems, Georges G. E. Gielen, Willy M. C. Sa...
DAC
2004
ACM
13 years 10 months ago
Hierarchical approach to exact symbolic analysis of large analog circuits
—This paper proposes a novel approach to the exact symbolic analysis of very large analog circuits. The new method is based on determinant decision diagrams (DDDs) representing s...
Sheldon X.-D. Tan, Weikun Guo, Zhenyu Qi
ASPDAC
2007
ACM
152views Hardware» more  ASPDAC 2007»
13 years 9 months ago
A Graph Reduction Approach to Symbolic Circuit Analysis
A new graph reduction approach to symbolic circuit analysis is developed in this paper. A Binary Decision Diagram (BDD) mechanism is formulated, together with a specially designed ...
Guoyong Shi, Weiwei Chen, C.-J. Richard Shi
DATE
2000
IEEE
91views Hardware» more  DATE 2000»
13 years 9 months ago
A Hierarchical Approach for the Symbolic Analysis of Large Analog Integrated Circuits
Oscar Guerra, Elisenda Roca, Francisco V. Fern&aac...
DATE
1997
IEEE
74views Hardware» more  DATE 1997»
13 years 9 months ago
An algorithm for numerical reference generation in symbolic analysis of large analog circuits
Ignacio Garcia-Vargas, Mariano Galan, Francisco V....