48 search results - page 1 / 10 » Symbolic functional and timing verification of transistor-le... |
DAC
1994
ACM
13 years 9 months ago
1994
ACM
This paper describes a diagnosis technique for locating design errors in circuit implementations which do not match their functional specification. The method efficiently propagat...
ICCAD
1999
IEEE
13 years 9 months ago
1999
IEEE
We introduce a new method of verifying the timing of custom CMOS circuits. Due to the exponential number of patterns required, traditional simulation methods are unable to exhaust...
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
TACAS
1998
Springer
13 years 9 months ago
1998
Springer
This paper enables symbolic ternary simulation of systems with large embedded memories. Each memory array is replaced with a behavioral model, where the number of symbolic variable...
ASPDAC
2004
ACM
13 years 8 months ago
2004
ACM
When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...