– This paper describes a new technique for extracting clock-level finite state machines(FSMs) from transistor netlists using symbolic simulation. The transistor netlist is prepr...
Manish Pandey, Alok Jain, Randal E. Bryant, Derek ...
Every pregroup grammar is shown to be strongly equivalent to one which uses basic types and left and right adjoints of basic types only. Therefore a semantical interpretation is i...
We present a framework for the certification of compilation and of compiled programs. Our approach uses a symbolic transfer functions-based representation of programs, so as to ch...
In this paper we present a complete method for verifying properties expressed in the temporal logic CTL. In contrast to the majority of verification methods presented in recent yea...
Interpretation Using Typed Decision Graphs Laurent Mauborgne LIENS, ´Ecole Normale Sup´erieure, 45 rue d’Ulm, 75230 Paris cedex 05, France Abstract. This article presents a way...