7 search results - page 1 / 2 » Synchronization Verification in System-Level Design with ILP... |
IEICET
2006
13 years 4 months ago
2006
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
Optimized solvers for the Boolean Satisfiability (SAT) problem have many applications in areas such as hardware and software verification, FPGA routing, planning, etc. Further use...
CL
2010
Springer
13 years 4 months ago
2010
Springer
In this paper we present the syntax, semantics, and compilation of a new system-level programming language called SystemJ. SystemJ is a multiclock language supporting the Globally...
DAC
2005
ACM
14 years 5 months ago
2005
ACM
In the design of highly complex, heterogeneous, and concurrent systems, deadlock detection and resolution remains an important issue. In this paper, we systematically analyze the ...
FMCAD
2006
Springer
13 years 8 months ago
2006
Springer
Ario is a solver for systems of linear integer arithmetic logic. Such systems are commonly used in design verification applications and are classified under Satisfiability Modulo T...