76 search results - page 2 / 16 » Synthesis and Simulation of Digital Systems Containing Inter... |
ISSS
2002
IEEE
13 years 10 months ago
2002
IEEE
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
GECCO
2004
Springer
13 years 11 months ago
2004
Springer
Abstract. The current trend in Embedded Systems (ES) design is moving towards the integration of increasingly complex applications on a single chip. An Embedded System has to satis...
DATE
1999
IEEE
13 years 10 months ago
1999
IEEE
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
DSD
2005
IEEE
13 years 11 months ago
2005
IEEE
We describe a new e-learning environment and a runtime platform for educational tools on digital system testing and design for testability. This environment is being developed in ...
MSE
2005
IEEE
13 years 11 months ago
2005
IEEE
This paper describes the authors experience with teaching VHDL (and more recently, Verilog) to undergraduate and graduate students at WPI and to engineers through various short co...