for a state machine which is an abstraction for an existing sequential circuit, which can be useful for redesign or engineering change. The generated state machines can be further ...
We present an algorithm for synthesising controllers specified in a subset of the interval temporal logic Duration Calculus [13]. The synthesised controllers are given as PLC-Auto...
Future Interval Logic (FIL) and its intuitive graphical representation, Graphical Interval Logic (GIL), can be used as the formal description language of model checking tools to v...
This paper describes a set of tools that allows a developer to instrument an autonomous control system to log data at run-time and then analyze that data to verify correct program...
David Kortenkamp, Reid G. Simmons, Tod Milam, Joaq...