Sciweavers

12 search results - page 1 / 3
» Synthesis of Low-Power Selectively-Clocked Systems from High...
Sort
View
ISSS
1996
IEEE
94views Hardware» more  ISSS 1996»
13 years 8 months ago
Synthesis of Low-Power Selectively-Clocked Systems from High-Level Specification
Luca Benini, Patrick Vuillod, Claudionor Jos&eacut...
TCAD
2010
121views more  TCAD 2010»
12 years 11 months ago
Translation Validation of High-Level Synthesis
The growing complexity of systems and their implementation into silicon encourages designers to look for model designs at higher levels of abstraction and then incrementally build ...
Sudipta Kundu, Sorin Lerner, Rajesh K. Gupta
VLSID
2003
IEEE
253views VLSI» more  VLSID 2003»
14 years 4 months ago
High Level Synthesis from Sim-nML Processor Models
The design of modern complex embedded systems require a high level of abstraction of the design. The SimnML[1] is a specification language to model processors for such designs. Se...
Souvik Basu, Rajat Moona
DATE
2004
IEEE
152views Hardware» more  DATE 2004»
13 years 8 months ago
A Design Methodology for the Exploitation of High Level Communication Synthesis
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
Francesco Bruschi, Massimo Bombana
FDL
2005
IEEE
13 years 10 months ago
Hardware Synthesis of Parallel Machines from SystemC
Heterogeneous system specifications implicitly assume parallel execution of their components that rely on supporting platform architectures and operating systems. Unfortunately, c...
Antoni Portero, Lluis Ribas, Jordi Carrabina