41 search results - page 1 / 9 » Synthesis of synchronous elastic architectures |
DAC
2006
ACM
14 years 5 months ago
2006
ACM
A simple protocol for latency-insensitive design is presented. The main features of the protocol are the efficient implementation of elastic communication channels and the automat...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
This paper describes an implementation language and synthesis system for automatically generating latency insensitive synchronous digital designs. These designs decouple behaviora...
ECMAST
1998
Springer
13 years 8 months ago
1998
Springer
We have de ned an execution architecture for playing back synchronized multimedia documents. We suppose that such documents i ed by means of several abstractions including hypertim...
ENTCS
2008
13 years 4 months ago
2008
This paper reports on the design of a test chip built to test a) a new latency insensitive network fabric protocol and circuits, b) a new synchronizer design, and c) how efficient...
DAC
2007
ACM
14 years 5 months ago
2007
ACM
A protocol for latency-insensitive design with early evaluation is presented. The protocol is based on a symmetric view of the system in which tokens carrying information move in ...