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» Synthesizing Switching Logic to Minimize Long-Run Cost
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DAC
1999
ACM
13 years 9 months ago
Automated Phase Assignment for the Synthesis of Low Power Domino Circuits
High performance circuit techniques such as domino logic have migrated from the microprocessor world into more mainstream ASIC designs. The problem is that domino logic comes at a...
Priyadarshan Patra, Unni Narayanan
ISPD
2004
ACM
146views Hardware» more  ISPD 2004»
13 years 10 months ago
Power-aware clock tree planning
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
Monica Donno, Enrico Macii, Luca Mazzoni
DAC
2004
ACM
13 years 9 months ago
Implicit pseudo boolean enumeration algorithms for input vector control
In a CMOS combinational logic circuit, the subthreshold leakage current in the standby state depends on the state of the inputs. In this paper we present a new approach to identif...
Kaviraj Chopra, Sarma B. K. Vrudhula
CN
1999
154views more  CN 1999»
13 years 5 months ago
Architectural Considerations in the Design of WDM-Based Optical Access Networks
We describe a WDM-based optical access network architecture for providing broadband Internet services. The architecture uses a passive collection and distribution network and a co...
Eytan Modiano, Richard A. Barry
FUIN
2008
83views more  FUIN 2008»
13 years 5 months ago
Fault Diagnosis with Static and Dynamic Observers
We study sensor minimization problems in the context of fault diagnosis. Fault diagnosis consists in synthesizing a diagnoser that observes a given plant and identifies faults in t...
Franck Cassez, Stavros Tripakis