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» Synthetic circuit generation using clustering and iteration
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FPGA
2003
ACM
88views FPGA» more  FPGA 2003»
13 years 11 months ago
Synthetic circuit generation using clustering and iteration
Paul D. Kundarewich, Jonathan Rose
FPGA
1997
ACM
145views FPGA» more  FPGA 1997»
13 years 10 months ago
Generation of Synthetic Sequential Benchmark Circuits
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct problem for FPGA vendors: how to test and evaluate the ...
Michael D. Hutton, Jonathan Rose, Derek G. Corneil
IPPS
2009
IEEE
14 years 14 days ago
Generation of Synthetic Floating-Point benchmark circuits
Synthetic Floating-Point (SFP), a synthetic benchmark generator program for floating-point circuits is presented. SFP consists of two independent modules for characterisation and...
T. Chun Pong Chau, S. Man Ho Ho, Philip H. W. Leon...
ISPD
1999
ACM
98views Hardware» more  ISPD 1999»
13 years 10 months ago
Towards synthetic benchmark circuits for evaluating timing-driven CAD tools
For the development and evaluation of CAD-tools for partitioning, floorplanning, placement, and routing of digital circuits, a huge amount of benchmark circuits with suitable cha...
Dirk Stroobandt, Peter Verplaetse, Jan Van Campenh...
ECML
2001
Springer
13 years 10 months ago
Iterative Double Clustering for Unsupervised and Semi-supervised Learning
We present a powerful meta-clustering technique called Iterative Double Clustering (IDC). The IDC method is a natural extension of the recent Double Clustering (DC) method of Slon...
Ran El-Yaniv, Oren Souroujon