23 search results - page 4 / 5 » System Level Modelling of Reconfigurable FFT Architecture fo... |
CC
2008
Springer
13 years 6 months ago
2008
Springer
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
Achieving high performance under a peak temperature limit is a first-order concern for VLSI designers. This paper presents a new model of a thermally-managed system, where a stoch...
CORR
2010
Springer
13 years 4 months ago
2010
Springer
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
ENTCS
2008
13 years 4 months ago
2008
Emerging architectures such as partially reconfigurable FPGAs provide a huge potential for adaptivity in the area of embedded systems. Since many system functions are only execute...
HPCA
2006
IEEE
14 years 5 months ago
2006
IEEE
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...