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MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
13 years 10 months ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood
CLADE
2003
IEEE
13 years 10 months ago
vGrid: A Framework For Building Autonomic Applications
With rapid technological advances in network infrastructure, programming languages, compatible component interfaces and so many more areas, today the computational Grid has evolve...
Bithika Khargharia, Salim Hariri, Manish Parashar,...
NSDI
2007
13 years 7 months ago
A Systematic Framework for Unearthing the Missing Links: Measurements and Impact
The lack of an accurate representation of the Internet topology at the Autonomous System (AS) level is a limiting factor in the design, simulation, and modeling efforts in inter-d...
Yihua He, Georgos Siganos, Michalis Faloutsos, Sri...
MOBICOM
2003
ACM
13 years 10 months ago
MiSer: an optimal low-energy transmission strategy for IEEE 802.11a/h
Reducing the energy consumption by wireless communication devices is perhaps the most important issue in the widely-deployed and exponentially-growing IEEE 802.11 Wireless LANs (W...
Daji Qiao, Sunghyun Choi, Amit Jain, Kang G. Shin
IPPS
2010
IEEE
13 years 3 months ago
Scalable multi-pipeline architecture for high performance multi-pattern string matching
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasa...