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DAC
2004
ACM
14 years 5 months ago
System design for DSP applications in transaction level modeling paradigm
In this paper, we systematically define three transaction level TLMs), which reside at different levels of abstraction between the functional and the implementation model of a DSP...
Abhijit K. Deb, Axel Jantsch, Johnny Öberg
IPPS
2007
IEEE
13 years 11 months ago
QUKU: A FPGA Based Flexible Coarse Grain Architecture Design Paradigm using Process Networks
DSP applications can be suitably represented using Process Network Models. This paper uses a modification of Kahn Process Network to solve the problem of finding an optimum arch...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
CODES
2005
IEEE
13 years 10 months ago
A power estimation methodology for systemC transaction level models
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
Nagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan
DATE
2002
IEEE
84views Hardware» more  DATE 2002»
13 years 9 months ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...
SUTC
2010
IEEE
13 years 2 months ago
Transaction-Level Modeling for Sensor Networks Using SystemC
—As sensor networks are finding widespread use across many applications, designers increasingly must not only focus on application development, but also on sensor network optimiz...
Jeff Hiner, Ashish Shenoy, Roman L. Lysecky, Susan...