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» System-Level Dynamic Thermal Management for High-Performance...
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DATE
2006
IEEE
87views Hardware» more  DATE 2006»
13 years 10 months ago
Thermal resilient bounded-skew clock tree optimization methodology
The existence of non-uniform thermal gradients on the substrate in high performance IC’s can significantly impact the performance of global on-chip interconnects. This issue is...
Ashutosh Chakraborty, Prassanna Sithambaram, Karth...
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
14 years 4 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
SIGMETRICS
2003
ACM
129views Hardware» more  SIGMETRICS 2003»
13 years 9 months ago
Run-time modeling and estimation of operating system power consumption
The increasing constraints on power consumption in many computing systems point to the need for power modeling and estimation for all components of a system. The Operating System ...
Tao Li, Lizy Kurian John
ICCAD
2003
IEEE
152views Hardware» more  ICCAD 2003»
14 years 1 months ago
Dynamic Fault-Tolerance and Metrics for Battery Powered, Failure-Prone Systems
Emerging VLSI technologies and platforms are giving rise to systems with inherently high potential for runtime failure. Such failures range from intermittent electrical and mechan...
Phillip Stanley-Marbell, Diana Marculescu