217 search results - page 1 / 44 » System-Level Modeling and Verification: a Comprehensive Desi... |
EURODAC
1994
IEEE
13 years 8 months ago
1994
IEEE
AHS
2007
IEEE
13 years 8 months ago
2007
IEEE
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
CODES
1999
IEEE
13 years 8 months ago
1999
IEEE
We present a case study on the design of a heterogeneous architecture for MPEG-2 video decoding. The primary objective of the case study is the validation of the SPADE methodology...
IEICET
2006
13 years 4 months ago
2006
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
ICCD
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper presents a methodology to generate a hierarchy of power models for power estimation of custom hardware IP blocks, enabling a trade-off between power estimation accuracy...