4 search results - page 1 / 1 » System-level power estimation using an on-chip bus performan... |
ICCAD
2008
IEEE
14 years 1 months ago
2008
IEEE
In this paper we propose an on-chip bus PMU which makes accurate estimates of system power consumption from a first-order linear power model by utilizing system-level activity in...
VLSID
2005
IEEE
14 years 4 months ago
2005
IEEE
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
CODES
2004
IEEE
13 years 8 months ago
2004
IEEE
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
SIGMOD
2005
ACM
14 years 4 months ago
2005
ACM
We present algorithms for fast quantile and frequency estimation in large data streams using graphics processor units (GPUs). We exploit the high computational power and memory ba...