8 search results - page 2 / 2 » TAM Optimization for Mixed-Signal SOCs using Analog Test Wra... |
DATE
2007
IEEE
13 years 12 months ago
2007
IEEE
Abstract— We present an SoC testing approach that integrates test data compression, TAM/test wrapper design, and test scheduling. An improved LFSR reseeding technique is used as ...
DATE
2003
IEEE
13 years 11 months ago
2003
IEEE
One of the difficult problems which core-based systemon-chip (SoC) designs face is test access. For testing the cores in a SoC, a special mechanism is required, since they are no...
ICCD
2008
IEEE
14 years 2 months ago
2008
IEEE
— Test-access mechanisms (TAMs) and test wrappers (e.g., the IEEE Standard 1500 wrapper) facilitate the modular testing of embedded cores in a core-based system-on-chip (SOC). Su...