4 search results - page 1 / 1 » Tailoring pipeline bypassing and functional unit mapping to ... |
CASES
2001
ACM
13 years 8 months ago
2001
ACM
In this paper we describe a design exploration methodology for clustered VLIW architectures. The central idea of this work is a set of three techniques aimed at reducing the cost ...
TVLSI
2002
13 years 4 months ago
2002
In this paper, we propose a low-power approach to the design of embedded very long instruction word (VLIW) processor architectures based on the forwarding (or bypassing) hardware, ...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
With new sophisticated compiler technology, it is possible to schedule distant instructions efficiently. As a consequence, the amount of exploitable instruction level parallelism...
ICCD
2003
IEEE
14 years 1 months ago
2003
IEEE
A critical problem in wide-issue superscalar processors is the limit on cycle time imposed by the central register file and operand bypass network. In this paper, a distributed re...