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» Techniques for Verifying Superscalar Microprocessors
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CALCO
2007
Springer
202views Mathematics» more  CALCO 2007»
13 years 11 months ago
Algebraic Models of Simultaneous Multithreaded and Multi-core Processors
Much current work on modelling and verifying microprocessors can accommodate pipelined and superscalar processors. However, superscalar and pipelined processors are no longer state...
Neal A. Harman
CAV
1998
Springer
108views Hardware» more  CAV 1998»
13 years 9 months ago
Decomposing the Proof of Correctness of pipelined Microprocessors
We present a systematic approach to decompose and incrementally build the proof of correctness of pipelined microprocessors. The central idea is to construct the abstraction funct...
Ravi Hosabettu, Mandayam K. Srivas, Ganesh Gopalak...
MICRO
1999
IEEE
100views Hardware» more  MICRO 1999»
13 years 9 months ago
A Superscalar 3D Graphics Engine
3D graphics performance is increasing faster than any other computing application. Almost all PC systems now include 3D graphics accelerators for games, CAD, or visualization appl...
Andrew Wolfe, Derek B. Noonburg
ISHPC
1999
Springer
13 years 9 months ago
Instruction-Level Microprocessor Modeling of Scientific Applications
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
Kirk W. Cameron, Yong Luo, James Scharzmeier
HPCA
2003
IEEE
14 years 5 months ago
Deterministic Clock Gating for Microprocessor Power Reduction
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykuma...