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ITC
2002
IEEE
94views Hardware» more  ITC 2002»
13 years 9 months ago
Techniques to Reduce Data Volume and Application Time for Transition Test
1 Scan based transition tests are added to improve the detection of speed failures using scan tests. Empirical data suggests that both data volume and application time, for transi...
Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, P...
VLSID
2005
IEEE
131views VLSI» more  VLSID 2005»
14 years 4 months ago
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
VTS
2007
IEEE
143views Hardware» more  VTS 2007»
13 years 10 months ago
RTL Test Point Insertion to Reduce Delay Test Volume
In this paper, a novel test point insertion methodology is presented for RTL designs that aims to reduce the data volume of scan-based transition delay tests. Test points are iden...
Kedarnath J. Balakrishnan, Lei Fang
DFT
2002
IEEE
117views VLSI» more  DFT 2002»
13 years 9 months ago
Fast and Energy-Frugal Deterministic Test Through Test Vector Correlation Exploitation
Conversion of the flip-flops of the circuit into scan cells helps ease the test challenge; yet test application time is increased as serial shift operations are employed. Furthe...
Ozgur Sinanoglu, Alex Orailoglu