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» Technology Mapping for FPGAs with Embedded Memory Blocks
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FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
14 years 3 days ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
RTAS
2007
IEEE
14 years 6 days ago
Optimizing the FPGA Implementation of HRT Systems
The availability of programmable hardware devices with high density of logic elements and the possibility of implementing CPUs (called softcores) using a fraction of the FPGA area...
Marco Di Natale, Enrico Bini
CHI
2008
ACM
14 years 6 months ago
Design, adoption, and assessment of a socio-technical environment supporting independence for persons with cognitive disabilitie
A significant fraction of persons with cognitive disabilities are potentially able to live more independently with the use of powerful tools embedded in their social environment. ...
Stefan Carmien, Gerhard Fischer
FCCM
2006
IEEE
113views VLSI» more  FCCM 2006»
14 years 7 hour ago
GraphStep: A System Architecture for Sparse-Graph Algorithms
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, D...
IPPS
2003
IEEE
13 years 11 months ago
Multi-Paradigm Framework for Parallel Image Processing
A software framework for the parallel execution of sequential programs using C++ classes is presented. The functional language Concurrent ML is used to implement the underlying ha...
David J. Johnston, Martin Fleury, Andy C. Downton