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» Temporal Logic Verification Using Simulation
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EUROCAST
2007
Springer
159views Hardware» more  EUROCAST 2007»
13 years 9 months ago
Ant Colony Optimization for Model Checking
Abstract Model Checking is a well-known and fully automatic technique for checking software properties, usually given as temporal logic formulas on the program variables. Most of m...
Enrique Alba, J. Francisco Chicano
FTRTFT
1998
Springer
13 years 9 months ago
On the Need for Practical Formal Methods
A controversial issue in the formal methods community is the degree to which mathematical sophistication and theorem proving skills should be needed to apply a formal method. A fun...
Constance L. Heitmeyer
KBSE
2005
IEEE
13 years 11 months ago
Automated test generation for engineering applications
In test generation based on model-checking, white-box test criteria are represented as trap conditions written in a temporal logic. A model checker is used to refute trap conditio...
Songtao Xia, Ben Di Vito, César Muño...
WIOPT
2005
IEEE
13 years 11 months ago
A New Relaying Scheme for Cheap Wireless Relay Nodes
Wireless networks consist of senders, receivers, and intermediate nodes that collaborating (more or less) to establish the communication paths. Most of the researches in the domai...
Ramin Khalili, Kavé Salamatian
ATAL
2009
Springer
13 years 12 months ago
Monitoring social expectations in Second Life
Online virtual worlds such as Second Life provide a rich medium for unstructured human interaction in a shared simulated 3D environment. However, many human interactions take place...
Stephen Cranefield, Guannan Li