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» Tera-scale computing and interconnect challenges
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NOCS
2009
IEEE
13 years 11 months ago
Networks-on-chip in emerging interconnect paradigms: Advantages and challenges
Communication plays a crucial role in the design and performance of multi-core systems-on-chip (SoCs). Networks-on-chip (NoCs) have been proposed as a promising solution to simpli...
Luca P. Carloni, Partha Pande, Yuan Xie
WONS
2012
IEEE
12 years 18 hour ago
Challenges and implications of using ultrasonic communications in intra-body area networks
Abstract— Body area networks (BANs) promise to enable revolutionary biomedical applications by wirelessly interconnecting devices implanted or worn by humans. However, BAN wirele...
Laura Galluccio, Tommaso Melodia, Sergio Palazzo, ...
IPPS
2008
IEEE
13 years 11 months ago
Modeling and predicting application performance on parallel computers using HPC challenge benchmarks
A method is presented for modeling application performance on parallel computers in terms of the performance of microkernels from the HPC Challenge benchmarks. Specifically, the a...
Wayne Pfeiffer, Nicholas J. Wright
HOTI
2005
IEEE
13 years 10 months ago
Challenges in Building a Flat-Bandwidth Memory Hierarchy for a Large-Scale Computer with Proximity Communication
Memory systems for conventional large-scale computers provide only limited bytes/s of data bandwidth when compared to their flop/s of instruction execution rate. The resulting bo...
Robert J. Drost, Craig Forrest, Bruce Guenin, Ron ...