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TCAD
2010
102views more  TCAD 2010»
12 years 11 months ago
Functional Test Generation Using Efficient Property Clustering and Learning Techniques
Abstract--Functional verification is one of the major bottlenecks in system-on-chip design due to the combined effects of increasing complexity and lack of automated techniques for...
Mingsong Chen, Prabhat Mishra
HAIS
2011
Springer
12 years 7 months ago
Clustering Ensemble for Spam Filtering
One of the main problems that modern e-mail systems face is the management of the high degree of spam or junk mail they recieve. Those systems are expected to be able to distinguis...
Santiago Porras, Bruno Baruque, Belén Vaque...
VLSID
2009
IEEE
115views VLSI» more  VLSID 2009»
14 years 5 months ago
Efficient Techniques for Directed Test Generation Using Incremental Satisfiability
Functional validation is a major bottleneck in the current SOC design methodology. While specification-based validation techniques have proposed several promising ideas, the time ...
Prabhat Mishra, Mingsong Chen
ICCAD
2002
IEEE
116views Hardware» more  ICCAD 2002»
14 years 1 months ago
Conflict driven techniques for improving deterministic test pattern generation
This work presents several new techniques for enhancing the performance of deterministic test pattern generation for VLSI circuits. The techniques introduced are called dynamic de...
Chen Wang, Sudhakar M. Reddy, Irith Pomeranz, Xiji...
IADIS
2008
13 years 5 months ago
Modelling Collaborative Competence Level Using Machine Learning Techniques
Using open e-learning platforms as a tool to support the learning process has become an international tendency. Specially, in order to motivate the achievement of desired competen...
Laura Mancera Valetts, Silvia Baldiris Navarro, Ra...