3 search results - page 1 / 1 » Test Instruction Set (TIS) for High Level Self-Testing of CP... |
ATS
2004
IEEE
13 years 8 months ago
2004
IEEE
TIS (Test Instruction Set) is an instruction level technique for CPU core self-testing. This method is based on enhancing a CPU instruction set with test instructions. TIS replace...
DATE
2002
IEEE
13 years 9 months ago
2002
IEEE
Software self-testing for embedded processor cores based on their instruction set, is a topic of increasing interest since it provides an excellent test resource partitioning tech...
CASCON
2008
13 years 6 months ago
2008
Parabix (parallel bit streams for XML) is an open-source XML parser that employs the SIMD (single-instruction multiple-data) capabilities of modern-day commodity processors to del...