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DATE
2009
IEEE
98views Hardware» more  DATE 2009»
13 years 11 months ago
Test architecture design and optimization for three-dimensional SoCs
Core-based system-on-chips (SoCs) fabricated on threedimensional (3D) technology are emerging for better integration capabilities. Effective test architecture design and optimizat...
Li Jiang, Lin Huang, Qiang Xu
ICCAD
2009
IEEE
94views Hardware» more  ICCAD 2009»
13 years 2 months ago
Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint
We propose a layout-driven test-architecture design and optimization technique for core-based system-on-chips (SoCs) that are fabricated using three-dimensional (3D) integration. ...
Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. ...
TVLSI
2008
105views more  TVLSI 2008»
13 years 4 months ago
Robust Concurrent Online Testing of Network-on-Chip-Based SoCs
Lifetime concerns for complex systems-on-a-chip (SoC) designs due to decreasing levels in reliability motivate the development of solutions to ensure reliable operation. A precurso...
Praveen Bhojwani, Rabi N. Mahapatra
DAC
2006
ACM
14 years 5 months ago
Scheduling-based test-case generation for verification of multimedia SoCs
Multimedia SoCs are characterized by a main controller that directs the activity of several cores, each of which is in charge of a stage in the processing of a media stream. The v...
Amir Nahir, Avi Ziv, Roy Emek, Tal Keidar, Nir Ron...
DAC
2002
ACM
14 years 5 months ago
The next chip challenge: effective methods for viable mixed technology SoCs
The next generation of computer chips will continue the trend for more complexity than their predecessors. Many of them will contain different chip technologies and are termed SoC...
H. Bernhard Pogge