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ICPP
1995
IEEE
13 years 8 months ago
The Application of Skewed-Associative Memories to Cache Only Memory Architectures
— Skewed-associative caches use several hash functions to reduce collisions in caches without increasing the associativity. This technique can increase the hit ratio of a cache w...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
SC
1994
ACM
13 years 8 months ago
Tolerating node failures in cache only memory architectures
Alain Gefflaut, Christine Morin, Michel Banâ...
ASPLOS
1996
ACM
13 years 8 months ago
Shasta: A Low Overhead, Software-Only Approach for Supporting Fine-Grain Shared Memory
This paper describes Shasta, a system that supports a shared address space in software on clusters of computers with physically distributed memory. A unique aspect of Shasta compa...
Daniel J. Scales, Kourosh Gharachorloo, Chandramoh...
MICRO
2003
IEEE
128views Hardware» more  MICRO 2003»
13 years 9 months ago
IPStash: a Power-Efficient Memory Architecture for IP-lookup
Abstract—High-speed routers often use commodity, fully-associative, TCAMs (Ternary Content Addressable Memories) to perform packet classification and routing (IP lookup). We prop...
Stefanos Kaxiras, Georgios Keramidas
ISCAPDCS
2004
13 years 5 months ago
One-Level Cache Memory Design for Scalable SMT Architectures
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past de...
Muhamed F. Mudawar, John R. Wani