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ASPLOS
1987
ACM
13 years 8 months ago
The Effect of Instruction Set Complexity on Program Size and Memory Performance
One potentialdisadvantage of a machine with a reduced instruction. set is that object programs may be substantially larger than those for a machine with a richer, more complex ins...
Jack W. Davidson, Richard A. Vaughan
IEEEPACT
2002
IEEE
13 years 9 months ago
Cost Effective Memory Dependence Prediction using Speculation Levels and Color Sets
Memory dependence prediction allows out-of-order issue processors to achieve high degrees of instruction level parallelism by issuing load instructions at the earliest time withou...
Soner Önder
ICCAD
2002
IEEE
152views Hardware» more  ICCAD 2002»
14 years 1 months ago
Efficient instruction encoding for automatic instruction set design of configurable ASIPs
Application-specific instructions can significantly improve the performance, energy, and code size of configurable processors. A common approach used in the design of such instruc...
Jong-eun Lee, Kiyoung Choi, Nikil Dutt
TVLSI
2002
98views more  TVLSI 2002»
13 years 4 months ago
Minimizing memory access energy in embedded systems by selective instruction compression
We propose a technique for reducing the energy spent in the memory-processor interface of an embedded system during the execution of firmware code. The method is based on the idea ...
Luca Benini, Alberto Macii, Enrico Macii, Massimo ...
CGO
2010
IEEE
13 years 11 months ago
Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bi
For memory constrained embedded systems code size is at least as important as performance. One way of increasing code density is to exploit compact instruction formats, e.g. ARM T...
Tobias J. K. Edler von Koch, Igor Böhm, Bj&ou...