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» The Entropy of FPGA Reconfiguration
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ANCS
2010
ACM
13 years 3 months ago
The case for hardware transactional memory in software packet processing
Software packet processing is becoming more important to enable differentiated and rapidly-evolving network services. With increasing numbers of programmable processor and acceler...
Martin Labrecque, J. Gregory Steffan
VLSISP
2011
358views Database» more  VLSISP 2011»
13 years 5 days ago
Accelerating Machine-Learning Algorithms on FPGAs using Pattern-Based Decomposition
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
Karthik Nagarajan, Brian Holland, Alan D. George, ...
FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
12 years 9 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
BIOADIT
2006
Springer
13 years 9 months ago
Robot Control: From Silicon Circuitry to Cells
Life-like adaptive behaviour is so far an illusive goal in robot control. A capability to act successfully in a complex, ambiguous, and harsh environment would vastly increase the ...
Soichiro Tsuda, Klaus-Peter Zauner, Yukio-Pegio Gu...
CDES
2006
158views Hardware» more  CDES 2006»
13 years 6 months ago
A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...
Himanshu Thapliyal, Vishal Verma, Hamid R. Arabnia