237 search results - page 47 / 48 » The Garp Architecture and C Compiler |
ICCAD
2008
IEEE
14 years 2 months ago
2008
IEEE
— As transistor sizes continue to shrink and the number of transistors per chip keeps increasing, chip multiprocessors (CMPs) are becoming a promising alternative to remain on th...
ICS
2007
Tsinghua U.
13 years 12 months ago
2007
Tsinghua U.
This paper investigates helper threads that improve performance by prefetching data on behalf of an application’s main thread. The focus is data prefetch helper threads that lac...
LCTRTS
2007
Springer
13 years 12 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
CODES
2005
IEEE
13 years 11 months ago
2005
IEEE
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
APLAS
2005
ACM
13 years 11 months ago
2005
ACM
This paper presents a novel method to construct a dynamic single assignment (DSA) form of array-intensive, pointer-free C programs (or in any other procedural language). A program ...