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ARVLSI
1997
IEEE
151views VLSI» more  ARVLSI 1997»
13 years 8 months ago
The Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
Tadaaki Yamauchi, Lance Hammond, Kunle Olukotun
ICCD
1999
IEEE
136views Hardware» more  ICCD 1999»
13 years 9 months ago
ActiveOS: Virtualizing Intelligent Memory
Current trends in DRAM memory chip fabrication have led many researchers to propose \intelligent memory" architectures that integrate microprocessors or logic with memory. Su...
Mark Oskin, Frederic T. Chong, Timothy Sherwood
MICRO
2002
IEEE
173views Hardware» more  MICRO 2002»
13 years 9 months ago
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
Christoforos E. Kozyrakis, David A. Patterson