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    ASPDAC
    1999
    ACM
    149views Hardware» more  ASPDAC 1999»
    The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance
    13 years 8 months ago
    The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance
    Download  www.cecs.uci.edu
    : In VLSI circuits with deep sub-micron, the parasitic capacitance from interconnect is a very important factor determining circuit performances such as power and time-delay. The B...
    Jinsong Hou, Zeyi Wang, Xianlong Hong
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    ASPDAC
    2000
    ACM
    97views Hardware» more  ASPDAC 2000»
    Hierarchical computation of 3-D interconnect capacitance using direct boundary element method
    13 years 8 months ago
    Hierarchical computation of 3-D interconnect capacitance using direct boundary element method
    Download  learn.tsinghua.edu.cn
    Jiangchun Gu, Zeyi Wang, Xianlong Hong
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    ICCAD
    1993
    IEEE
    121views Hardware» more  ICCAD 1993»
    Hierarchical extraction of 3D interconnect capacitances in large regular VLSI structures
    13 years 8 months ago
    Hierarchical extraction of 3D interconnect capacitances in large regular VLSI structures
    Download  cas.et.tudelft.nl
    For submicron integrated circuits, 3D numerical techniques are required to accurately compute the values of the interconnect capacitances. In this paper, we describe an hierarchic...
    Arjan J. van Genderen, N. P. van der Meijs
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    ASPDAC
    2001
    ACM
    82views Hardware» more  ASPDAC 2001»
    A virtual 3-D multipole accelerated extractor for VLSI parasitic interconnect capacitance
    13 years 8 months ago
    A virtual 3-D multipole accelerated extractor for VLSI parasitic interconnect capacitance
    Download  learn.tsinghua.edu.cn
    A virtual 3-D extractor of the single dielectric is presented in this paper. In the indirect boundary integral equations, the plane charge distribution on the surface of conductors...
    Zhaozhi Yang, Zeyi Wang, Shuzhou Fang
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    ICCAD
    2009
    IEEE
    136views Hardware» more  ICCAD 2009»
    A hierarchical floating random walk algorithm for fabric-aware 3D capacitance extraction
    13 years 2 months ago
    A hierarchical floating random walk algorithm for fabric-aware 3D capacitance extraction
    Download  www.mit.edu
    With the adoption of ultra regular fabric paradigms for controlling design printability at the 22nm node and beyond, there is an emerging need for a layout-driven, pattern-based p...
    Tarek A. El-Moselhy, Ibrahim M. Elfadel, Luca Dani...
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