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IWMM
2000
Springer
137views Hardware» more  IWMM 2000»
13 years 9 months ago
Cycles to Recycle: Garbage Collection on the IA-64
The IA-64, Intel's 64-bit instruction set architecture, exhibits a number of interesting architectural features. Here we consider those features as they relate to supporting ...
Richard L. Hudson, J. Eliot B. Moss, Sreenivas Sub...
LCTRTS
2001
Springer
13 years 10 months ago
ILP-based Instruction Scheduling for IA-64
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
Daniel Kästner, Sebastian Winkel
EUROPAR
2004
Springer
13 years 11 months ago
SCISM vs IA-64 Tagging: Differences/Code Density Effects
In this paper we first present two tagging mechanisms; the SCISM and IA-64; thereafter we describe the mapping of IA-64 ISA to a SCISM configuration without changing or reassigni...
Georgi Gaydadjiev, Stamatis Vassiliadis
EUROPAR
2004
Springer
13 years 11 months ago
Link-Time Optimization of IA64 Binaries
Abstract. The features of the IA64 architecture create new opportunities for link-time optimization. At the same time they complicate the design of a link-time optimizer. This pape...
Bertrand Anckaert, Frederik Vandeputte, Bruno De B...
TPHOL
2000
IEEE
13 years 9 months ago
Formal Verification of IA-64 Division Algorithms
The IA-64 architecture defers floating point and integer division to software. To ensure correctness and maximum efficiency, Intel provides a number of recommended algorithms which...
John Harrison