This paper investigates the design of parallel algorithmic strategies that address the efficient use of both, memory hierarchies within each processor and a multilevel clustered ...
Frank K. H. A. Dehne, Stefano Mardegan, Andrea Pie...
We study the issue of performance prediction on the SGIPower Challenge, a typical SMP. On such a platform, the cost of memory accesses depends on their locality and on contention ...
Nancy M. Amato, Jack Perdue, Mark M. Mathis, Andre...
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
Phase change memory (PCM) is an emerging memory technology with many attractive features: it is non-volatile, byte-addressable, 2–4X denser than DRAM, and orders of magnitude be...
FG is a programming environment for asynchronous programs that run on clusters and fit into a pipeline framework. It enables the programmer to write a series of synchronous functi...