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» The Impact of Memory Hierarchies on Cluster Computing
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IPPS
2002
IEEE
13 years 10 months ago
Distribution Sweeping on Clustered Machines with Hierarchical Memories
This paper investigates the design of parallel algorithmic strategies that address the efficient use of both, memory hierarchies within each processor and a multilevel clustered ...
Frank K. H. A. Dehne, Stefano Mardegan, Andrea Pie...
IPPS
2000
IEEE
13 years 9 months ago
Predicting Performance on SMPs. A Case Study: The SGI Power Challenge
We study the issue of performance prediction on the SGIPower Challenge, a typical SMP. On such a platform, the cost of memory accesses depends on their locality and on contention ...
Nancy M. Amato, Jack Perdue, Mark M. Mathis, Andre...
DAC
2006
ACM
14 years 6 months ago
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
CIDR
2011
237views Algorithms» more  CIDR 2011»
12 years 8 months ago
Rethinking Database Algorithms for Phase Change Memory
Phase change memory (PCM) is an emerging memory technology with many attractive features: it is non-volatile, byte-addressable, 2–4X denser than DRAM, and orders of magnitude be...
Shimin Chen, Phillip B. Gibbons, Suman Nath
ISCAPDCS
2004
13 years 6 months ago
FG: A Framework Generator for Hiding Latency in Parallel Programs Running on Clusters
FG is a programming environment for asynchronous programs that run on clusters and fit into a pipeline framework. It enables the programmer to write a series of synchronous functi...
Thomas H. Cormen, Elena Riccio Davidson