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» The Inherent Queuing Delay of Parallel Packet Switches
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IFIP
2004
Springer
13 years 10 months ago
The Inherent Queuing Delay of Parallel Packet Switches
The parallel packet switch (PPS) extends the inverse multiplexing architecture, and is extensively used as the core of contemporary commercial switches. A key factor in the perfor...
Hagit Attiya, David Hay
SPAA
2005
ACM
13 years 10 months ago
Randomization does not reduce the average delay in parallel packet switches
Switching cells in parallel is a common approach to build switches with very high external line rate and a large number of ports. A prime example is the parallel packet switch (in...
Hagit Attiya, David Hay
SPAA
2006
ACM
13 years 10 months ago
Packet-mode emulation of output-queued switches
Most common network protocols (e.g., the Internet Protocol) work with variable size packets, whereas contemporary switches still operate with fixed size cells, which are easier t...
Hagit Attiya, David Hay, Isaac Keslassy
GLOBECOM
2006
IEEE
13 years 11 months ago
Packet Delay-Aware Scheduling in Input Queued Switches
Abstract— Virtual Output Queuing is widely used by highspeed packet switches to overcome head-of-line blocking. This is done by means of matching algorithms. In fixed-length VOQ...
Yihan Li, Shivendra S. Panwar, H. Jonathan Chao, J...
TON
2002
65views more  TON 2002»
13 years 4 months ago
Switching using parallel input-output queued switches with no speedup
Abstract--We propose an efficient parallel switching architecture that requires no speedup and guarantees bounded delay. Our architecture consists of input
Saad Mneimneh, Vishal Sharma, Kai-Yeung Siu