7 search results - page 1 / 2 » The Interaction of Software Prefetching with ILP Processors ... |
ISCA
1997
IEEE
13 years 8 months ago
1997
IEEE
Current microprocessors aggressively exploit instructionlevel parallelism (ILP) through techniques such as multiple issue, dynamic scheduling, and non-blocking reads. Recent work ...
ISCA
1994
IEEE
13 years 8 months ago
1994
IEEE
This paper evaluates the tradeoffs involved in the design of the software-extended memory system of Alewife, a multiprocessor architecturethat implements coherentsharedmemorythrou...
SC
1995
ACM
13 years 8 months ago
1995
ACM
The goal of this work is to explore architectural mechanisms for supporting explicit communication in cachecoherent shared memory multiprocessors. The motivation stems from the ob...
RTAS
2008
IEEE
13 years 11 months ago
2008
IEEE
Embedded systems are often subject to constraints that require determinism to ensure that task deadlines are met. Such systems are referred to as real-time systems. Schedulability...
TC
2010
12 years 11 months ago
2010
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...