4 search results - page 1 / 1 » The MIT Alewife Machine: Architecture and Performance |
ISCA
1998
IEEE
13 years 8 months ago
1998
IEEE
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
HPCA
1998
IEEE
13 years 8 months ago
1998
IEEE
The goal of this paper is to gain insight into the relative performance of communication mechanisms as bisection bandwidth and network latency vary. We compare shared memory with ...
ASPLOS
1991
ACM
13 years 8 months ago
1991
ACM
Caches enhance the performance of multiprocessors by reducing network trac and average memory access latency. However, cache-based systems must address the problem of cache coher...
IPPS
1996
IEEE
13 years 8 months ago
1996
IEEE
Brewer and Kuszmaul [BK94] demonstrated how barriers and traffic interleaving can alleviate the problem of bulk-transfer performance degradation on the Thinking Machines CM-5, by ...