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» The Soft Error Problem: An Architectural Perspective
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HPCA
2005
IEEE
13 years 10 months ago
The Soft Error Problem: An Architectural Perspective
Shubhendu S. Mukherjee, Joel S. Emer, Steven K. Re...
DAC
2005
ACM
13 years 6 months ago
Logic soft errors in sub-65nm technologies design and CAD challenges
Logic soft errors are radiation induced transient errors in sequential elements (flip-flops and latches) and combinational logic. Robust enterprise platforms in sub-65nm technolog...
Subhasish Mitra, Tanay Karnik, Norbert Seifert, Mi...
VLSID
2003
IEEE
104views VLSI» more  VLSID 2003»
14 years 4 months ago
Analyzing Soft Errors in Leakage Optimized SRAM Design
Reducing leakage power and improving the reliability of data stored in the memory cells are both becoming challenging as technology scales down. While the smaller threshold voltag...
Vijay Degalahal, Narayanan Vijaykrishnan, Mary Jan...
DSD
2010
IEEE
149views Hardware» more  DSD 2010»
13 years 2 months ago
Low Latency Recovery from Transient Faults for Pipelined Processor Architectures
Abstract--Recent technology trends have made radiationinduced soft errors a growing threat to the reliability of microprocessors, a problem previously only known to the aerospace i...
Marcus Jeitler, Jakob Lechner
LCTRTS
2009
Springer
13 years 11 months ago
A compiler optimization to reduce soft errors in register files
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
Jongeun Lee, Aviral Shrivastava