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» The Throughput of Data Switches with and without Speedup
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USENIX
1993
13 years 6 months ago
Exploiting In-Kernel Data Paths to Improve I/O Throughput and CPU Availability
We present the motivation, design, implementation, and performance evaluation of a UNIX kernel mechanism capable of establishing fast in-kernel data pathways between I/O objects. ...
Kevin R. Fall, Joseph Pasquale
GLOBECOM
2006
IEEE
13 years 11 months ago
Shared-Memory Combined Input-Crosspoint Buffered Packet Switch for Differentiated Services
— Combined input-crosspoint buffered (CICB) packet switches with dedicated crosspoint buffers require a minimum amount of memory in the buffered crossbar of N2 × k × L, where N...
Ziqian Dong, Roberto Rojas-Cessa
HPCA
2000
IEEE
13 years 9 months ago
Improving the Throughput of Synchronization by Insertion of Delays
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...
Ravi Rajwar, Alain Kägi, James R. Goodman
INFOCOM
2007
IEEE
13 years 11 months ago
Network Coding in a Multicast Switch
— We consider the problem of serving multicast flows in a crossbar switch. We show that linear network coding across packets of a flow can sustain traffic patterns that cannot...
Jay Kumar Sundararajan, Muriel Médard, MinJ...
INFOCOM
2006
IEEE
13 years 11 months ago
Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics
— Three-stage non-blocking switching fabrics are the next step in scaling current crossbar switches to many hundreds or few thousands of ports. Congestion (output contention) man...
Nikolaos Chrysos, Manolis Katevenis