18 search results - page 2 / 4 » The Verification of the On-Chip COMA Cache Coherence Protoco... |
CHARME
2001
Springer
13 years 8 months ago
2001
Springer
We consider the formal verification of the cache coherence protocol of the Stanford FLASH multiprocessor for N processors. The proof uses the SMV proof assistant, a proof system ba...
FMCAD
2004
Springer
13 years 8 months ago
2004
Springer
Abstract. We present a simple method for verifying the safety properties of cache coherence protocols with arbitrarily many nodes. Our presentation begins with two examples. The fi...
TC
1998
13 years 4 months ago
1998
—This paper describes the methods used to formulate and validate the memory subsystem of the cache-coherent Sun Scalable emory MultiProcessor (S3.mp) at three levels of abstracti...
DSD
2008
IEEE
13 years 6 months ago
2008
IEEE
Due to modern technology trends such as decreasing feature sizes and lower voltage levels, fault tolerance is becoming increasingly important in computing systems. Shared memory i...
ACTA
2006
13 years 4 months ago
2006
The lazy caching algorithm of Afek, Brown, and Merrit (1993) is a protocol that allows the use of local caches with delayed updates. It results in a memory model that is not atomi...