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» The effects of predicated execution on branch prediction
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ISCA
1995
IEEE
110views Hardware» more  ISCA 1995»
13 years 9 months ago
Instruction Cache Fetch Policies for Speculative Execution
Current trends in processor design are pointing to deeper and wider pipelines and superscalar architectures. The efficient use of these resources requires speculative execution, ...
Dennis Lee, Jean-Loup Baer, Brad Calder, Dirk Grun...
LCPC
2004
Springer
13 years 11 months ago
Branch Strategies to Optimize Decision Trees for Wide-Issue Architectures
Abstract. Branch predictors are associated with critical design issues for nowadays instruction greedy processors. We study two important domains where the optimization of decision...
Patrick Carribault, Christophe Lemuet, Jean-Thomas...
ICS
1998
Tsinghua U.
13 years 10 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
EXPCS
2007
13 years 9 months ago
Introducing entropies for representing program behavior and branch predictor performance
Predictors are inherent components of state-of-the-art microprocessors. Branch predictors are discussed actively from diverse perspectives. Performance of a branch predictor large...
Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba
ISCA
1999
IEEE
89views Hardware» more  ISCA 1999»
13 years 10 months ago
Simultaneous Subordinate Microthreading (SSMT)
Current work in Simultaneous Multithreading provides little benefit to programs that aren't partitioned into threads. We propose Simultaneous Subordinate Microthreading (SSMT...
Robert S. Chappell, Jared Stark, Sangwook P. Kim, ...