48 search results - page 1 / 10 » The synthesis of combinational logic to generate probabiliti... |
ICCAD
2009
IEEE
13 years 2 months ago
2009
IEEE
As CMOS devices are scaled down into the nanometer regime, concerns about reliability are mounting. Instead of viewing nanoscale characteristics as an impediment, technologies suc...
ICCAD
1998
IEEE
13 years 8 months ago
1998
IEEE
The intellectual property (IP) business model is vulnerable to a number of potentially devastating obstructions, such as misappropriation and intellectual property fraud. We propo...
ITC
2000
IEEE
13 years 8 months ago
2000
IEEE
We describe logic synthesis techniques for designing diverse implementations of combinational logic circuits in order to maximize the data integrity of diverse duplex systems in t...
GLVLSI
2007
IEEE
13 years 10 months ago
2007
IEEE
A special logic synthesis problem is considered for Boolean functions which have large don’t care sets and are irregular. Here, a function is considered as irregular if the inpu...
IROS
2006
IEEE
13 years 10 months ago
2006
IEEE
— A new biped gait generation and optimization method is proposed in the frame of Estimation of Distribution Algorithms (EDAs) with Q-learning method. By formulating the biped ga...