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» The very portable optimizer for digital signal processors
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CODES
2005
IEEE
13 years 11 months ago
Comparing two testbench methods for hierarchical functional verification of a bluetooth baseband adaptor
The continuous improvement on the design methodologies and processes has made possible the creation of huge and very complex digital systems. Design verification is one of the mai...
Edgar L. Romero, Marius Strum, Wang Jiang Chau
CLOUD
2010
ACM
13 years 11 months ago
Nephele/PACTs: a programming model and execution framework for web-scale analytical processing
We present a parallel data processor centered around a programming model of so called Parallelization Contracts (PACTs) and the scalable parallel execution engine Nephele [18]. Th...
Dominic Battré, Stephan Ewen, Fabian Hueske...
VLSID
1998
IEEE
116views VLSI» more  VLSID 1998»
13 years 10 months ago
Synthesis of Testable RTL Designs
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
C. P. Ravikumar, Sumit Gupta, Akshay Jajoo
OOPSLA
2005
Springer
13 years 11 months ago
Constructing a metacircular Virtual machine in an exploratory programming environment
Can virtual machine developers benefit from religiously observing the principles more often embraced for exploratory programming? To find out, we are concurrently constructing two...
David Ungar, Adam Spitz, Alex Ausch
CF
2004
ACM
13 years 11 months ago
Combining compiler and runtime IPC predictions to reduce energy in next generation architectures
Next generation architectures will require innovative solutions to reduce energy consumption. One of the trends we expect is more extensive utilization of compiler information dir...
Saurabh Chheda, Osman S. Unsal, Israel Koren, C. M...