248 search results - page 3 / 50 » Threaded Multiple Path Execution |
ISCA
1992
IEEE
13 years 9 months ago
1992
IEEE
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
ISPASS
2010
IEEE
13 years 3 months ago
2010
IEEE
Abstract--On NVIDIA's many-core GPUs, there is no synchronization function among parallel thread blocks. When finegranularity of data communication and synchronization is requ...
SP
2007
IEEE
13 years 11 months ago
2007
IEEE
Malicious code (or malware) is defined as software that fulfills the deliberately harmful intent of an attacker. Malware analysis is the process of determining the behavior and ...
CMG
2006
13 years 6 months ago
2006
Modern computer systems are based on a wide variety of software servers, such as web servers, application servers, database servers, and mail servers. The typical software archite...
ISCA
2003
IEEE
13 years 10 months ago
2003
IEEE
To address the increasing susceptibility of commodity chip multiprocessors (CMPs) to transient faults, we propose Chiplevel Redundantly Threaded multiprocessor with Recovery (CRTR...