25 search results - page 4 / 5 » Three challenges in Costas arrays |
DAC
2006
ACM
14 years 7 months ago
2006
ACM
Highly regular, nanodevice based architectures have been proposed to replace pure CMOS based architectures in the emerging post CMOS era. Since bottom-up self-assembly is used to ...
IPPS
2008
IEEE
14 years 18 days ago
2008
IEEE
As high-end computer systems present users with rapidly increasing numbers of processors, possibly also incorporating attached co-processors, programmers are increasingly challeng...
IPPS
2007
IEEE
14 years 15 days ago
2007
IEEE
As process technology advances toward deep submicron (below 90nm), static power becomes a new challenge to address for energy-efficient high performance processors, especially for...
ICNP
2003
IEEE
13 years 11 months ago
2003
IEEE
CAMs are the most popular practical method for implementing packet classification in high performance routers. Their principal drawbacks are high power consumption and inefficient...
DAGM
2010
Springer
13 years 7 months ago
2010
Springer
Abstract. We consider an automated processing pipeline for tissue micro array analysis (TMA) of renal cell carcinoma. It consists of several consecutive tasks, which can be mapped ...