Sciweavers

23 search results - page 2 / 5
» Timing Anomalies in Dynamically Scheduled Microprocessors
Sort
View
CNSM
2010
12 years 11 months ago
Semantic scheduling of active measurements for meeting network monitoring objectives
Network control and management techniques (e.g., dynamic path switching, on-demand bandwidth provisioning) rely on active measurements of end-to-end network status. These measureme...
Prasad Calyam, Lakshmi Kumarasamy, Füsun &Oum...
IPPS
2008
IEEE
13 years 11 months ago
A simple power-aware scheduling for multicore systems when running real-time applications
High-performance microprocessors, e.g., multithreaded and multicore processors, are being implemented in embedded real-time systems because of the increasing computational require...
Diana Bautista, Julio Sahuquillo, Houcine Hassan, ...
HPCA
2004
IEEE
14 years 4 months ago
Reducing the Scheduling Critical Cycle Using Wakeup Prediction
For highest performance, a modern microprocessor must be able to determine if an instruction is ready in the same cycle in which it is to be selected for execution. This creates a...
Todd E. Ehrhart, Sanjay J. Patel
CASES
2003
ACM
13 years 9 months ago
A control-theoretic approach to dynamic voltage scheduling
The development of energy-conscious embedded and/or mobile systems exposes a trade-off between energy consumption and system performance. Recent microprocessors have incorporated ...
Ankush Varma, Brinda Ganesh, Mainak Sen, Suchismit...
SC
2005
ACM
13 years 10 months ago
Performance-constrained Distributed DVS Scheduling for Scientific Applications on Power-aware Clusters
Left unchecked, the fundamental drive to increase peak performance using tens of thousands of power hungry components will lead to intolerable operating costs and failure rates. H...
Rong Ge, Xizhou Feng, Kirk W. Cameron