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» Timing driven power gating in high-level synthesis
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VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
13 years 10 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
DATE
2007
IEEE
130views Hardware» more  DATE 2007»
13 years 11 months ago
Development of on board, highly flexible, Galileo signal generator ASIC
Alcatel Alenia Space is deeply involved in the Galileo program at many stages. In particular, Alcatel Alenia Space has successfully designed and delivered the very first navigatio...
Louis Baguena, Emmanuel Liégeon, Alexandra ...
ICCD
2008
IEEE
165views Hardware» more  ICCD 2008»
14 years 1 months ago
Analysis and minimization of practical energy in 45nm subthreshold logic circuits
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...