93 search results - page 19 / 19 » Timing optimization of FPGA placements by logic replication |
FCCM
2007
IEEE
13 years 7 months ago
2007
IEEE
Creating a high throughput sparse matrix vector multiplication (SpMxV) implementation depends on a balanced system design. In this paper, we introduce the innovative SpMxV Solver ...
JNW
2008
13 years 5 months ago
2008
Recently overlay networks have emerged as an efficient and flexible method for content distribution. An overlay network is a network running on top of another network, usually the ...
CEE
2007
13 years 5 months ago
2007
It is a challenge to implement large word length public-key algorithms on embedded systems. Examples are smartcards, RF-ID tags and mobile terminals. This paper presents a HW/SW c...