2 search results - page 1 / 1 » Timing-driven variation-aware nonuniform clock mesh synthesi... |
GLVLSI
2010
IEEE
13 years 9 months ago
2010
IEEE
Clock skew variations adversely affect timing margins, limiting performance, reducing yield, and may also lead to functional faults. Non-tree clock distribution networks, such as ...
ICCAD
2010
IEEE
13 years 2 months ago
2010
IEEE
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...