3706 search results - page 1 / 742 » To Cache or Not To Cache |
MICRO
2008
IEEE
13 years 11 months ago
2008
IEEE
It is well recognized that LRU cache-line replacement can be ineffective for applications with large working sets or non-localized memory access patterns. Specifically, in lastle...
HPCA
2006
IEEE
13 years 10 months ago
2006
IEEE
Caches are very inefficiently utilized because not all the excess data fetched into the cache, to exploit spatial locality, is utilized. We define cache utilization as the percent...
GLVLSI
2005
IEEE
13 years 10 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
WMPI
2004
ACM
13 years 10 months ago
2004
ACM
Clustered microarchitectures are an effective organization to deal with the problem of wire delays and complexity by partitioning some of the processor resources. The organization ...
WMPI
2004
ACM
13 years 10 months ago
2004
ACM
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past dec...